Rajat Jaiswal

I am a Junior Undergraduate in the Department of Computer Science & Engineering at IIT Delhi.

My interests lie in the field of computer vision, machine learning, image processing, and data science.

Email  /  Resume  /  LinkedIn  /  Github

Here are some selected projects that I have worked on

A 32-bit CPU designed for complete ARMv7 instruction set, writtten in Very High Speed Integrated Circuit Hardware Description Language(VHDL), and implemented on Basys3 Field Programmable Gate Array(FPGA) Board

A C++ simulator for Indian road traffic intersection, using OpenGL for GUI rendering. It supports realistic lane change behavior for Indian traffic. The simulator can be visualized on terminal as well as OpenGL.

A multi-leveled role-playing based arcade game developed using impact.js. Fun to play for people like me who loved the 8-bit retro world and always look back to the games we played as a child to unwind.

A compiler with call-by-name(Krivine Machine) and call-by-value(SECD Machine) semantics, implemented in OCaml. It takes tokens generated from a Lexer to create an Abstract Syntax Tree using recursive Parser.

Last updated on 30^th July 2020

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